
5.0 x 7.0 mm, 3.3 V, LVPECL/LVDS, Clock Oscillators
Parameter | Symbol | Minimum | Typical | Maximum | Unit | Notes |
---|---|---|---|---|---|---|
Frequency Range | FR | 0.75 | 700 | MHz | ||
Frequency Stability | ΔFT/F | (See Ordering Information) | ppm | |||
Operating Temperature | TA | (See Ordering Information) | °C | |||
Storage Temperature | TS | -55 | +125 | °C | ||
Aging | -3/-5 | +3/+5 | ppm | <52 MHz/≥52 MHz | ||
Aging | -3/-5 | +3/+5 | ppm | <52 MHz/≥52 MHz 1st Year | ||
Aging | -1/-2 | +1/+2 | ppm | <52 MHz/≥52 MHz Thereafter (per year) | ||
Input Voltage | VDD | 3.135 | 3.3 | 3.465 | V | |
Input Current | IDD | 70/30 | mA | PECL/LVDS 0.75 to 24 MHz | ||
Input Current | IDD | 100/60 | mA | PECL/LVDS 24 to 700 MHz | ||
Symmetry (Duty Cycle) | tDC | (See Ordering Information) | @ 50% of waveform | |||
Rise/Fall Time | tR/tF | 0.35 | 0.55 | ns | @ 20/80% LVPECL | |
Rise/Fall Time | tR/tF | 0.50 | 1.0 | ns | @ 20/80% LVDS | |
Logic "1" Level | VOH | Vcc-1.02 | V | LVPECL | ||
Logic "0" Level | VOL | Vcc-1.63 | V | LVPECL | ||
Output Type | PECL/LVDS | |||||
Output Load | CL | PECL load-see Load Curcuit Diagram #5. LVDS load-see circuit Diagram#9. Consult factory with nonstandard output load requirments. | ||||
Output Load | CL | 50 Ohms to Vcc-2 VCD | PECL Waveform | |||
Output Load | CL | 100 Ohms differential load | LVDS Waveform | |||
Differential Voltage | 250 | 350 | 450 | mV | LVDS | |
Output Skew | 200 | ps | PECL | |||
Startup Time | tSU | 10 | ms | |||
Phase Jitter | ΦJ | Consult factory for phase jitter at other specific frequencies. | ||||
Phase Jitter | ΦJ | 2.25 | ps RMS | Integrated 12 kHz - 20 MHz (0.75 to 49.00 MHz)(Typical) | ||
Phase Jitter | ΦJ | 0.35 | ps RMS | Integrated 12 kHz - 20 MHz (50.00 to 161.00 MHz)(Typical) | ||
Phase Jitter | ΦJ | 2.85 | ps RMS | Integrated 12 kHz - 20 MHz (162.00 to 239.00 MHz)(Typical) | ||
Phase Jitter | ΦJ | 1.95 | ps RMS | Integrated 12 kHz - 20 MHz (240.00 to 499.00 MHz)(Typical) | ||
Phase Jitter | ΦJ | 1.30 | ps RMS | Integrated 12 kHz - 20 MHz (500.00 to 700.00 MHz)(Typical) | ||
Phase Jitter | ΦJ | 2.25 | ps RMS | Integrated 12 kHz - 20 MHz (0.75 to 49.00 MHz)(Typical) |
Parameter | Method/Condition | Note |
---|---|---|
Mechanical Shock | MIL-STD-202, Method 213, Condition C (100 g, 6 ms duration, ½ sine wave) | |
Vibration | MIL-STD-202, Methods 201 & 204 (10 g from 10 Hz to 2000 Hz) | |
Thermal Cycle | MIL-STD-883, Method 1010, Condition B (-55 °C to +125 °C, 15 min dwell, 10 cycles) | |
Hermeticity | MIL-STD-202, Method 112 (1 x 10^-8 atm. cc/s of helium) | |
Solderability | EIAJ-STD-002 | |
Max Soldering Conditions | EIAJ-STD-002 | |
Max Soldering Conditions | See Solder Profile |
Please refer to the Datasheet.
Please refer to the Datasheet.